#ifndef _IO_H_
#define _IO_H_


ext    uchar Io_Control_Flag;

////////////////////////////////////////////////////////////////
// /////////             I/O port definiton                   //
////////////////////////////////////////////////////////////////

/******************PA_Port Bit Define****************          
    
*******************************************************/
#define REMOTE_RECEIVER		PA_IDR3		//INT

#define IR_PORT_LEVEL			REMOTE_RECEIVER
#if AMP_MODEL==ADN_BUS
#define VIDEO_R_SEL2        PA_ODR6
#endif
/****************** PB_Port Bit Define****************          
    
*******************************************************/
#ifdef D_TEMDET_CTL_FAN
#ifdef NEW_MAINBOARD
#define TEM_DET_AD				AIN2
#elif defined COSTDOWN_MAINBOARD
#define TEM_DET_AD				AIN11
#else
#define TEM_DET_AD				AIN1
#endif
#endif

#ifdef NEW_MAINBOARD
#define RDS_QUAL				PE_IDR6
#elif defined COSTDOWN_MAINBOARD
#define RDS_QUAL				PB_IDR3
#else
#define RDS_QUAL				PB_IDR0
#endif

#ifdef COSTDOWN_MAINBOARD
#define D_VIDEO_SYNC_SEL		PG_ODR0
#else
#ifdef D_PP2HARDWAWRE_SET
#define D_VIDEO_SYNC_SEL		PC_ODR2
#else
#define D_VIDEO_SYNC_SEL		PB_ODR6
#endif
#endif
#define ENCODER_TUNE_VALUE	PB_IDR6
#define ENCODER_TUNE_AD		AIN6
#define ENCODER_VOL_VALUE	PB_IDR7
#define ENCODER_VOL_AD		AIN7
/* **********************PC_Port Bit Define ****************          
    
*******************************************************/
#ifdef NEW_MAINBOARD
#define ASP_I2C_CTL				
#define TUNER_I2C_CTL			
#else
#define ASP_I2C_CTL				PC_ODR0
#define TUNER_I2C_CTL			PC_ODR1
#endif
#ifndef D_PP2HARDWAWRE_SET
#define TFT_PWR_CTL				PC_ODR2
#endif
#ifdef COSTDOWN_MAINBOARD
#define MCU_RST_MPEG_IO		PB_ODR4
#else
#define MCU_RST_MPEG_IO		PC_ODR3
#endif
#ifdef COSTDOWN_MAINBOARD

#else
#define MCU_RST_TFT_IO			PC_ODR4
#endif

#define SPI_SCK					PC_ODR5
#define SPI_MOSI_OUT			PC_ODR6

#define SPI_MIS0				PC_IDR7
#define SPI_MIS0_DDR			PC_DDR7
#define SPI_MIS0_OUT			PC_ODR7

/***********************PD_Port Bit Define****************          
    
*******************************************************/
#if AMP_MODEL==ADN_BUS
#define VIDEO_F_SEL2        PD_ODR2
#endif
#define BEEP_OUT_IO			PD_ODR4
#define PD_LINUART_TXIO		PD_ODR5
#if AMP_MODEL==ADN_BUS
#define VIDEO_F_SEL1        PD_ODR7
#endif

/************************PE_Port Bit Define ****************          
    
*******************************************************/
#ifdef COSTDOWN_MAINBOARD
#define NAVI_GATE_IN		PA_IDR6
#define NAVI_GATE_CR1		PA_CR16
#define NAVI_GATE_CR2		PA_CR26
#define NAVI_GATE_DDR		PA_DDR6
#else
#define NAVI_GATE_IN		PE_IDR0
#define NAVI_GATE_CR1		PE_CR10
#define NAVI_GATE_CR2		PE_CR20
#define NAVI_GATE_DDR		PE_DDR0
#endif
#define I2C1_SCL_OUT			PE_ODR1
#define I2C1_SCL_IN				PE_IDR1
#define I2C1_SCL_CR1			PE_CR11
#define I2C1_SCL_CR2			PE_CR21
#define I2C1_SCL_DDR			PE_DDR1

#define I2C1_SDA_OUT			PE_ODR2
#define I2C1_SDA_IN				PE_IDR2
#define I2C1_SDA_CR1			PE_CR12
#define I2C1_SDA_CR2			PE_CR22
#define I2C1_SDA_DDR			PE_DDR2
#ifdef COSTDOWN_MAINBOARD
#define ILLUMI_DET				PE_IDR0
#else
#define ILLUMI_DET				PE_IDR3
#endif
#ifdef COSTDOWN_MAINBOARD
#define ACC_DET_LEVEL			PD_IDR2
#else
#define ACC_DET_LEVEL			PE_IDR4
#endif
#define SPI_SS					PE_ODR5

#define Stop_SPI_CS				SPI_SS=HIGH_LEVEL;
#define Start_SPI_CS				SPI_SS=LOW_LEVEL;



#define ILLUMI_IS_ACTIVE		ILLUMI_DET==LOW_LEVEL///ILLUMI_DET==HIGH_LEVEL

///#define NAVI_GATE_DDR		PE_DDR0
///#define NAVI_GATE_OUT		PE_ODR0
#ifdef NEW_MAINBOARD
#define PD_SAMPLEAD      	 		PB_DDR0
#define PCR1_SAMPLEAD   		PB_CR10
#define PCR2_SAMPLEAD   		PB_CR20
#define PinIn_SAMPLEAD   		PB_IDR0
#define AspAD   					AIN0
#else
#define PD_SAMPLEAD      	 		PE_DDR6
#define PCR1_SAMPLEAD   		PE_CR16
#define PCR2_SAMPLEAD   		PE_CR26
#define PinIn_SAMPLEAD   		PE_IDR6
#define AspAD   					AIN9
#endif
#ifdef NEW_MAINBOARD
#define  PD_SAMPLECLK       		PB_DDR1
#define  PCR1_SAMPLECLK    		PB_CR11
#define  PCR2_SAMPLECLK    		PB_CR21
#define  PinOut_SAMPLECLK    		PB_ODR1
#else
#define  PD_SAMPLECLK       		PE_DDR7
#define  PCR1_SAMPLECLK    		PE_CR17
#define  PCR2_SAMPLECLK    		PE_CR27
#define  PinOut_SAMPLECLK    		PE_ODR7
#endif


/***********************PF_Port Bit Define ****************          
    
*******************************************************/
#ifdef COSTDOWN_MAINBOARD
#define BATTERY_VOLT_DET_AD	AIN12
#else
#define BATTERY_VOLT_DET_AD	AIN10
#endif
#ifdef COSTDOWN_MAINBOARD
#define ADCH_KEY1				AIN10
#else
#define ADCH_KEY1				AIN15
#endif
///#define ADCH_KEY2      		AIN15

#ifdef COSTDOWN_MAINBOARD
#define WHEEL_KEY1				AIN14
#else
#define WHEEL_KEY1				AIN13
#endif
#ifdef NEW_MAINBOARD
#define WHEEL_KEY2				AIN12
#elif defined COSTDOWN_MAINBOARD
#define WHEEL_KEY2				AIN13
#else
#define WHEEL_KEY2				AIN11
#endif
#ifdef NEW_MAINBOARD
#define PD_SSTOP				PH_DDR6
#define PCR1_SSTOP				PH_CR16
#define PCR2_SSTOP				PH_CR26
////#define Pin_SSTOP				PH_ODR6
#define PinIn_SSTOP				PH_IDR6

#define PD_FSU					PE_DDR7
#define PCR1_FSU				PE_CR17
#define PCR2_FSU				PE_CR27
#define AD_FSU					AIN8
#elif defined COSTDOWN_MAINBOARD
#define PD_SSTOP				PB_DDR2
#define PCR1_SSTOP				PB_CR12
#define PCR2_SSTOP				PB_CR22
////#define Pin_SSTOP				PB_ODR6
#define PinIn_SSTOP				PB_IDR2

#define PD_FSU					PB_DDR1
#define PCR1_FSU				PB_CR11
#define PCR2_FSU				PB_CR21
#define AD_FSU					AIN1
#else
#define PD_SSTOP				PF_DDR4
#define PCR1_SSTOP				PF_CR14
#define PCR2_SSTOP				PF_CR24
////#define Pin_SSTOP				PF_ODR4
#define PinIn_SSTOP				PF_IDR4

#define PD_FSU					PF_DDR6
#define PCR1_FSU				PF_CR16
#define PCR2_FSU				PF_CR26
#define AD_FSU					AIN14
#endif
/***********************PG_Port Bit Define ****************          
    
*******************************************************/
///#define CAN_TX				PG_IDR0
///#define CAN_RX				PG_ODR1
///#define SEL_SD				PG_ODR0
#if AMP_MODEL==ADN_BUS
#define AUDIO_R_SEL1        PG_ODR0
#define AUDIO_R_SEL2        PG_ODR1
#endif
#ifdef COSTDOWN_MAINBOARD
#define FAN_PWR_CTL			PF_ODR7
#else
#define FAN_PWR_CTL			PG_ODR3
#endif
#ifdef COSTDOWN_MAINBOARD
#define REVERSE_DET_LEVEL	PE_IDR4
#define REVERSE_DET_DDR		PE_DDR4
#define REVERSE_DET_CR1		PE_CR14
#define REVERSE_DET_CR2		PE_CR24
#else
#define REVERSE_DET_LEVEL	PG_IDR2
#define REVERSE_DET_DDR		PG_DDR2
#define REVERSE_DET_CR1		PG_CR12
#define REVERSE_DET_CR2		PG_CR22
#endif
#ifdef COSTDOWN_MAINBOARD
#define ADVD_MODE_IO			PD_ODR0
#else
#define ADVD_MODE_IO			PG_ODR5
#endif
#ifdef COSTDOWN_MAINBOARD
#define DISC_IN_SIGN			PB_ODR5
#else
#define DISC_IN_SIGN			PG_ODR6
#endif
#ifdef NEW_MAINBOARD
#define NAVI_PWR_IO				
#else
#define NAVI_PWR_IO				PG_ODR7
#endif

///#define Set_PWM_LED			KEY_LED_PWM=HIGH_LEVEL;
///#define Clr_PWM_LED			KEY_LED_PWM=LOW_LEVEL;


/**********************PH_Port Bit Define ****************          
    
*******************************************************/
#ifdef COSTDOWN_MAINBOARD
#define BT_POWER_CTL			PG_ODR1
#else
#define BT_POWER_CTL			PH_ODR0
#endif
#ifdef COSTDOWN_MAINBOARD
#define PARKING_DET_LEVEL		PE_IDR3
#else
#define PARKING_DET_LEVEL		PH_IDR1
#endif
#ifdef NEW_MAINBOARD
#define RDS_DATA				PC_IDR0
#else
#define RDS_DATA				PH_IDR2
#endif
#ifdef COSTDOWN_MAINBOARD
#define POWER_ON_CTRL			PD_ODR7
#else
#define POWER_ON_CTRL			PH_ODR3
#endif

#ifdef NEW_MAINBOARD
#define MUTE_F					PF_ODR6
#define MUTE_F_DDR				PF_DDR6
#define MUTE_F_CR1				PF_CR16
#define MUTE_F_CR2				PF_CR26

#define FRAUDIO_SEL1			PH_ODR4
#define FRAUDIO_SEL2			PH_ODR5

#define MUTE_R					PH_ODR2
#define MUTE_R_CR1				PH_CR12
#define MUTE_R_DDR				PH_DDR2
#elif defined COSTDOWN_MAINBOARD
#define MUTE_F					PG_ODR7
#define MUTE_F_DDR				PG_DDR7
#define MUTE_F_CR1				PG_CR17
#define MUTE_F_CR2				PG_CR27

#define FRAUDIO_SEL1			PG_ODR3
#define FRAUDIO_SEL2			PG_ODR2

#define MUTE_R					PG_ODR6
#define MUTE_R_CR1				PG_CR16
#define MUTE_R_DDR				PG_DDR6
#else
#define MUTE_F					PH_ODR4
#define MUTE_F_DDR				PH_DDR4
#define MUTE_F_CR1				PH_CR14
#define MUTE_F_CR2				PH_CR24

#define FRAUDIO_SEL1			PH_ODR5
#define FRAUDIO_SEL2			PH_ODR6

#define MUTE_R					PH_ODR7
#define MUTE_R_CR1				PH_CR17
#define MUTE_R_DDR				PH_DDR7
#endif

/************************PI_Port Bit Define ****************/      
    
#define AUTO_ANT_CTL			PI_ODR0

#ifdef COSTDOWN_MAINBOARD
#define TUNER_POWER_CTL		PG_ODR5
#else
#define TUNER_POWER_CTL		PI_ODR3
#endif
#ifdef COSTDOWN_MAINBOARD
#define ASP_I2C_SDA_OUT		PG_ODR4
#define ASP_I2C_SDA_IN		PG_IDR4
#define ASP_I2C_SDA_CR1		PG_CR14
#define ASP_I2C_SDA_CR2		PG_CR24
#define ASP_I2C_SDA_DDR		PG_DDR4

#define ASP_I2C_SCL_OUT		PI_ODR0
#define ASP_I2C_SCL_IN		PI_IDR0
#define ASP_I2C_SCL_CR1		PI_CR10
#define ASP_I2C_SCL_CR2		PI_CR20
#define ASP_I2C_SCL_DDR		PI_DDR0
#else
#define ASP_I2C_SDA_OUT		PI_ODR1
#define ASP_I2C_SDA_IN		PI_IDR1
#define ASP_I2C_SDA_CR1		PI_CR11
#define ASP_I2C_SDA_CR2		PI_CR21
#define ASP_I2C_SDA_DDR		PI_DDR1

#define ASP_I2C_SCL_OUT		PI_ODR2
#define ASP_I2C_SCL_IN		PI_IDR2
#define ASP_I2C_SCL_CR1		PI_CR12
#define ASP_I2C_SCL_CR2		PI_CR22
#define ASP_I2C_SCL_DDR		PI_DDR2
#endif
#ifdef COSTDOWN_MAINBOARD
#define TOUCH_SEL_IO			PC_ODR3
#elif defined D_PP2HARDWAWRE_SET
#define TOUCH_SEL_IO			PI_ODR6
#else
#define TOUCH_SEL_IO			PI_ODR5
#define BACKLIGHT_PWM_CTL		PI_ODR6
#endif
#ifdef NEW_MAINBOARD
#define NAVI_ACC_IO				
#else
#define NAVI_ACC_IO				PI_ODR4
#endif
////#define EJECT_KEY_IN		PI_IDR6////????
///#define EJKEY_FLAOT_IN		{PI_CR16=0;}
#if AMP_MODEL==ADN_BUS
#define VIDEO_R_SEL1        PI_ODR7
#endif
///#define ZERO_MUTE	  		ASP_DVD_UNMUTE=0;
///#define ZERO_UMUTE			ASP_DVD_UNMUTE=1;


/***********************END IO DEFINE********************************/


#define MUTE_ALL    			{MUTE_F=1;MUTE_R=1;}
#define UNMUTE_ALL			{MUTE_F=0;MUTE_R=0;}

#define MUTE_FVOL			{MUTE_F=1;}
#define UNMUTE_FVOL		{MUTE_F=0;}

#define MUTE_RVOL			{MUTE_R=1;}
#define UNMUTE_RVOL		{MUTE_R=0;}
#ifdef NEW_MAINBOARD
#define TUNER_I2C_SELECT	//{ASP_I2C_CTL=0;TUNER_I2C_CTL=1; }
#define ASP_I2C_SELECT		//{TUNER_I2C_CTL=0; ASP_I2C_CTL=1; }
#else
#define TUNER_I2C_SELECT	{ASP_I2C_CTL=0;TUNER_I2C_CTL=1; }
#define ASP_I2C_SELECT		{TUNER_I2C_CTL=0; ASP_I2C_CTL=1; }
#endif
#define RUNNING_MPEG		{ MCU_RST_MPEG_IO=0;}
#define RESETING_MPEG		{ClrBit(Io_Control_Flag, 0); MCU_RST_MPEG_IO=1;}
#define MPEG_IS_RUNNING  	(GetBit(Io_Control_Flag, 0))
#define MPEG_INIT_OK		 SetBit(Io_Control_Flag, 0);

#define Set_TUNER_CTRL		{SetBit(Io_Control_Flag, 1); TUNER_POWER_CTL=1;}
#define Clr_TUNER_CTRL		{ClrBit(Io_Control_Flag, 1); TUNER_POWER_CTL=0;}
#define Tuner_Is_PwrOn		GetBit(Io_Control_Flag, 1)
#ifndef D_PP2HARDWAWRE_SET
#define TFT_PWR_ON			{TFT_PWR_CTL=1;}
#define TFT_PWR_OFF		 	{TFT_PWR_CTL=0;}
#else
#define TFT_PWR_ON			{;}
#define TFT_PWR_OFF		 	{;}
#endif
#ifdef COSTDOWN_MAINBOARD
#define Tft_Reset_OFF		{;}
#define Tft_Reset_On		{;}
#else
#define Tft_Reset_OFF		{MCU_RST_TFT_IO=0;}
#define Tft_Reset_On		{/*MCU_RST_TFT_IO=1*/;}
#endif
#define IREVERSE_IS_ACTIVE	REVERSE_DET_LEVEL==LOW_LEVEL
#ifdef NEW_MAINBOARD
#define OPEN_NAVI			//{NAVI_PWR_IO=1;}
#define CLOSE_NAVI			//{NAVI_PWR_IO=0;}
#else
#define OPEN_NAVI			{NAVI_PWR_IO=1;}
#define CLOSE_NAVI			{NAVI_PWR_IO=0;}
#endif
///#define NAVI_RST_H			{NAVI_RST_IO=1;}
///#define NAVI_RST_L			{NAVI_RST_IO=0;}

#define Show_Have_Disc		{ClrBit(Io_Control_Flag, 3); DISC_IN_SIGN=LOW_LEVEL;}
#define Show_No_Disc		{SetBit(Io_Control_Flag, 3);DISC_IN_SIGN=HIGH_LEVEL;}
#define GET_DISC_SIGN		 GetBit(Io_Control_Flag, 3)

#define TurnOn_System_Power	 {SetBit(Io_Control_Flag, 2); POWER_ON_CTRL=HIGH_LEVEL;}
#define TurnOff_System_Power 	{ClrBit(Io_Control_Flag, 2); POWER_ON_CTRL=LOW_LEVEL;}
#define Main_Power()      			 GetBit(Io_Control_Flag, 2)

///#define EN_BACKLGT			{BACKLIGHT_CTL_IO=1;}
///#define DIS_BACKLGT			{BACKLIGHT_CTL_IO=0;}



#define TOUCH_SEL_NAVI			TOUCH_SEL_IO=0;
#define TOUCH_SEL_MCU			TOUCH_SEL_IO=1;

#define AUDIO_SEL_6CH			;///ADP_6CHSEL_IO=1;
#define AUDIO_SEL_2CH			;///ADP_6CHSEL_IO=0;

 #define  Open_Fan				FAN_PWR_CTL=HIGH_LEVEL;		
 #define  Close_Fan				FAN_PWR_CTL=LOW_LEVEL;

 #define   AudioSet_DvdMode		ADVD_MODE_IO=HIGH_LEVEL;
  #define  AudioDisable_DvdMode	ADVD_MODE_IO=LOW_LEVEL;
///////////////////////////////////////////////////////////////////////<<
/*            DATA Register bit define          */
#define D0      0
#define D1      1
#define D2      2
#define D3      3
#define D4      4
#define D5      5
#define D6      6
#define D7      7



typedef enum
{
	LOW=0,
	HIGH=255
}PWMLEVEL;


typedef enum
{
	PARKDET_IDLE,
	PARKDET_IDLE_HIGH,
	PARKDET_IDLE_LOW,
	PARKDET_LOW1,
	PARKDET_HIGH1,
	PARKDET_LOW2,
	PARKDET_CARSTOP,
	PARKDET_DRV,
	PARKDET_STOP
} PARKDET_STATE;

#define N_SAMPLING_IPOD   		 5
#define N_SAMPLING_PARK        	 3
#define N_SAMPLING_LIGHTON     	 1
#define N_SAMPLING_LIGHTOFF   	 9
#define N_SAMPLING_VOLTAGE     	 4	
#define N_SAMPLING_ACC         	 42
#define N_SAMPLING_WAKEUP        8

ext PARKDET_STATE StopCar_State;
#if D_NO_CARD_AUTO_BACK
ext uchar No_Card_Timer;

#endif
ext uchar Specturn_DspW;

extern  void MCU_IO_Init(void);
extern  void PowerLedPro(uchar level);
///extern void Key_Led_Driver(void);
extern void Illumi_Detect(void);
extern void Park_Pro(void);
extern void Reverse_Detect(void);

extern void Hard_Mute_Front(void);
extern void Hard_Mute_Rear(void);
extern void Hard_Mute(void);
extern void Hard_UMute(void);

extern void MpegState_Switch_Monitor(void);
extern void StopCar_Detect(void);	

#if NAVI_FUNCTION
extern void Navi_Audio_Detect(void);
#endif
#ifdef D_TEMDET_CTL_FAN
extern void Tem_Det(void);
#endif
#ifdef ASP_SAMPLEFREQ
extern void GetAudio_SpectrumDate();
extern void InitAudio_SpectrumPort();
#endif
#endif	//_IO_H
